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Staff Engineer, Physical Design

Marvell Semiconductor, Inc.
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Aug 15, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Compute Custom and Storage (CCS) team at Marvell is seeking candidates for a Senior Staff Static Timing Analysis (STA) engineering position. Common projects within CCS range from artificial intelligence and machine learning, to wired and wireless infrastructure, with the latest technology nodes. The team utilizes the latest EDA software tools, and work through the technical challenges to insure we meet the performance, power, and area requirements of the design. This position will work in tandem with the Physical Design, Design For Test, and other teams both at a local and global level.

What You Can Expect

Work hands-on to triage workflows. Run RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip. Analyze performance by running timing analysis, and verify a robust power grid by performing EMIR analysis, especially on complex IP such as DDR, PCIe, etc. Work with a global team on both the physical design of complex chips as well as the methodology to enable an efficient and robust design process. Work closely with top level PD engineer, timing engineer, DFT engineer, and RTL designers. Review completed runs for errors or create optimizations from successful runs happen to verify that the database is ready to move on to the next level. Wage $156,853.00 - $157,853.00 per year.

What We're Looking For

Master's or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and two (2) years of experience in the job offered or related occupation.

Experience must include two (2) years with each of the following:

* Synopsys Fusion compiler.
* Physical design methodology flow.
* Working with PnR and complex blocks using latest technology nodes like 7nm, 5nm, 3nm.
* Multiple tool usage across Synopsys platforms: FC.
* Static timing analysis and synthesis.
* Formal verification.
* Scripting language: Python and TCL.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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